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PRODUCTS

MIPI

MIPI C-PHY 
P
hysical interface for CSI-2 providing 5.7Gbps per lane of bandwidth The MIPI C-PHY V1.0 improves throughput over a bandwidth-limited channel, allowing more data without increased signaling clock.
MIPI D-PHY   
P
hysical interface for CSI-2 and DSI providing 2.5Gbps per lane of bandwidth Arasan’s MIPI D-PHY Analog Transceiver IP Core is fully compliant to the D-PHY specification version 1.1. It supports the MIPI® Camera Serial Interface (CSI-2) and Display Serial Interface (DSI) protocols. It is a Universal PHY that can be configured as a transmitter, receiver, or transceiver. The D-PHY consists of an analog front end to generate and receive the electrical level signals, and a digital (PPI) interface to control the I/O functions.
MIPI A-PHY 
  • Asymmetric data link layer with point-to-point or daisy-chain topology
  • Up to 15-meter reach
  • Support 3 downlink speed gears Gear 1.0/2.0/3.0(2, 4, 8Gbps) 
  • 2 uplink speed gears (100 and 200 Mbps)
  • Ultra-low packet error rate (PER) of 10-19 for unprecedented reliability over vehicle lifetime
  • High-speed data, control data and optional power share the same physical wiring
  • Reduces complexity, cost, wiring and weight

PCIe

Gen 4 
Support PCIe 1.0/2.0/3.0/4.0 up to 16Gbps. CTLE boosts up to 18dB at 8GHz

PLL

PLL 
Support Frequency 
  • 218.75MHz - 14GHz

  • 13GHz - 15GHz

Data Center

CDR 
Provides dual-mode(NRZ and PAM4) high-performance, mixed-signal connectivity.

Single-lane transmission rate

  • 25G

  • 28G

  • 56G

  • 64G

  • 112G

TIA 
Support Type 
  • Limited Linear Amplifier

  • Unlimited Linear Amplifier

 Single-lane transmission rate

  • 25G

  • 28G

  • 56G

  • 64G

  • 112G

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